This application relates to the operation of nonvolatile memory systems such as semiconductor flash memory systems, and, more specifically, to systems and methods of calibrating temperature sensors in Application Specific Integrated Circuits (ASICs) that are used in such nonvolatile memory systems.
Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, and retains its stored data even after power is turned off. Also, unlike ROM (read only memory), flash memory is rewritable similar to a disk storage device. In spite of the higher cost, flash memory is increasingly being used in mass storage applications. Conventional mass storage, based on rotating magnetic medium such as hard drives and floppy disks, is unsuitable for the mobile and handheld environment. This is because disk drives tend to be bulky, are prone to mechanical failure and have high latency and high power requirements. These undesirable attributes make disk-based storage impractical in most mobile and portable applications. On the other hand, flash memory, both embedded and in the form of a removable card is ideally suited in the mobile and handheld environment because of its small size, low power consumption, high speed and high reliability features.
A nonvolatile memory chip generally includes an array of nonvolatile memory cells along with circuits used to access those cells and various peripheral circuits that may be used to transfer data to and from the memory array. For example, data buffers, sense amplifiers, charge pumps, voltage regulators, and other circuits may be formed on a nonvolatile memory chip.
In addition to flash memory, other forms of nonvolatile memory may be used in nonvolatile memory systems. For example Ferroelectric RAM (FeRAM, or FRAM) uses a ferroelectric layer to record data bits by applying an electric field that orients the atoms in a particular area with an orientation that indicates whether a “1” or a “0” is stored. Magnetoresistive RAM (MRAM) uses magnetic storage elements to store data bits. Phase-Change memory (PCME, or PRAM) such as Ovonic Unified Memory (OUM) uses phase changes in certain materials to record data bits. Various other nonvolatile memories are also in use or proposed for use in nonvolatile memory systems.
When writing data to a nonvolatile memory, a host typically assigns unique logical addresses to sectors, clusters or other units of data within a continuous virtual address space of the memory system. Like a disk operating system (DOS), the host writes data to, and reads data from, addresses within the logical address space of the memory system. A memory controller is typically provided within the memory system to translate logical addresses received from the host into physical addresses within the memory array, where the data are actually stored, and then keeps track of these address translations. The memory controller may also perform a variety of other functions related to managing the data stored in the nonvolatile memory and interfacing with the host.
A memory controller is typically formed on a memory controller chip that is separate from any memory chips. A memory controller chip may be an ASIC that is designed to perform the particular functions needed in a given memory system. These functions may include address translation as described above, error detection and correction using Error Correction Codes (ECC), communication with a host according to a particular communication protocol, performance of house-keeping operations such as garbage collection, wear-leveling between blocks in the nonvolatile memory, and other functions. While a memory controller chip is typically an ASIC, it can also be a general-purpose memory controller chip with some specific firmware, a Programmable Logic Device (PLD), or other chip. However, it is generally desirable for cost reasons to use an ASIC that is mass-produced at low cost per unit for large scale production.
A common nonvolatile memory system comprises one or more memory chips that are mounted on a printed circuit board, along with a memory controller chip, enclosed in a housing, and with a physical interface that allows it to be connected with a range of host devices. Examples of such standardized memory interfaces include: PCMCIA; SmartMedia; CompactFlash (CF); Memory Stick; SecureDigital (SD); miniSD; microSD and Universal Serial Bus (USB). The physical interface is generally accessible in a manner that allows electrical contacts in the physical interface of the memory system to contact corresponding electrical contacts in a host's physical interface when the memory system is connected to the host system (e.g. by inserting a memory card in an appropriate slot in a host system). Such nonvolatile memory systems are considered removable nonvolatile memory systems because they are easily connected to a host system, or disconnected from a host system. Host systems that are compatible with such removable memory systems include a range of consumer products such as Personal Computers (PCs); laptops; tablet computers; smartphones; cellphones; digital cameras; video cameras; music players such as MP3 players; and voice recorders.
Another common nonvolatile memory system is an embedded nonvolatile memory system which is configured to be permanently connected to a host system. Embedded nonvolatile memory systems may include one or more nonvolatile memory chips and a memory controller chip in some form of chip packaging. However, embedded nonvolatile memory systems do not have a physical interface that is designed for quick connection to, and disconnection from, a host system. Instead, embedded nonvolatile memory systems have physical interfaces that are designed for permanent attachment. For example, an embedded memory system may consist of a memory chip, and a controller chip, enclosed together in a ceramic package that can be connected to a host system through a Ball Grid Array (BGA) or similar Surface Mount Technology (SMT). An embedded memory system may be attached to a Printed Circuit Board (PCB) of a host system using SMT, or may be permanently attached to a host system in some other manner. In general, once such an embedded memory system is interfaced with a particular host it cannot be removed without damaging the memory system and/or the host system. In many electronic products, especially mobile products such as cell phones, tablet computers, and music players, solid-state nonvolatile memory may form the primary data storage medium in place of a hard-disk drive. Such memory is often referred to as a solid-state drive.
FIG. 1 shows an example of a prior art memory system which includes a flash memory chip, a memory controller chip, and a host interface, all enclosed in a housing that provides physical protection for the memory system. While the flash memory is shown as a single chip in FIG. 1, a nonvolatile memory may be made up of multiple nonvolatile memory chips that are all under the control of a memory controller. The host interface is typically a standardized interface and the outer dimensions of the housing are generally designed according to a form factor that is also standardized so that the memory system is physically compatible with a range of host systems. The memory controller performs many functions in this memory system. The exact functions may vary from one memory system to another. Additional dedicated chips may also be provided in a memory system, although for cost reasons it is generally desirable to have a single ASIC performing all required functions that are not performed in the nonvolatile memory chip, or chips.
Memory controller chips, like other integrated circuit chips, are designed using dimensions that shrink as technology develops. And the speed at which memory controllers operate generally increases as technology develops (i.e. clock speeds become faster). These factors tend to cause memory controllers to generate increasingly significant heat. If a memory controller chip becomes too hot, the chip may become damaged and may fail. Temperature sensing functionality has been included in a memory controller chip to attempt to detect when a chip becomes hot so that some action can be taken before the chip is damaged by heat.
FIG. 2 shows certain temperature-sensing related components of a prior art memory controller chip. The memory controller chip has two temperature sensors (TS) that are connected to a temperature reading circuit. The temperature reading circuit is also connected to a set of e-fuses. The temperature reading circuit receives an input from a temperature sensor and uses calibration data stored in the e-fuses to determine the actual temperature at the temperature sensor. This temperature can then be used to determine if the memory controller chip is becoming too hot. Calibration data stored in the e-fuses is generated and stored at a relatively early stage of manufacture when the memory controller die is still in a Silicon wafer. That is, the temperature calibration, and saving of calibration data is performed on a Silicon wafer having many memory controller dies before they are divided (diced up) into separate memory controller chips.
FIG. 3 shows an example of a Silicon wafer in which a large number of memory controller dies is formed. A typical present-day Silicon wafer has a diameter of 300 mm and may have thousands of individual dies (for example 12,000 memory controller dies). While in principle all dies are identically formed and therefore should have identical characteristics, in practice differences occur between dies resulting in different characteristics. Some dies may be faster, or slower, while some are completely defective. One characteristic that may vary from die to die, and from sensor to sensor even within a die, is the output of a temperature sensor at a given temperature.
FIG. 4 shows an example of the variation in measured temperature from a number of nominally identical temperature sensors that are at a uniform temperature. It can be seen that most sensors are within about ten degrees of the average (about 32 degrees) but there are significant numbers even outside this range. It has been found that distributions may extend as much as twenty degrees above and below the average. This clearly indicates the importance of performing temperature calibration so that the outputs of these temperature sensors can be used to provide an accurate temperature.
Typical prior art calibration of temperature sensors is performed by heating a Silicon wafer and measuring temperature sensor output at multiple temperatures. At least two temperatures are generally used (e.g. 25 and 90 degrees centigrade) so that a sensor's output over a range of temperature is obtained. Calibration data is then stored in the e-fuses so that it is available during operation of the memory controller. It will be understood that the memory controller is not functional at the time of this calibration because it is still part of a Silicon wafer and does not have power, or communication with any other component such as a memory chip or a host interface. While external probes may be used to provide power and communication to do some basic testing and to write e-fuses, the memory controller is generally not capable of performing its functions at this point. The memory controller may not even have its firmware loaded or available because the firmware may be provided later in a separate memory chip.
There are certain drawbacks to the calibration procedure described above. It requires that e-fuses or other similar data storage is present in the memory controller chip which may take up valuable space, require additional processing steps, and generally increase cost. It also requires some time to heat the Silicon wafer and to perform testing at the various temperatures used for calibration. And specialized equipment must be available to heat the wafer and maintain it at a given uniform temperature while performing the calibration.